TIMERS_INTSTATUS=Val_0x0
Timers Interrupt Status Register
TIMERS_INTSTATUS | Interrupt status of all timers after mask, where: Bit 1: LPTIMER1 Bit 0: LPTIMER0 For each bit: 0 (Val_0x0): Timer (n) interrupt is inactive. IRQ line is not asserted. 1 (Val_0x1): Timer (n) interrupt is active. IRQ line is asserted. |